AMD Fusion
From Wikipedia, the free encyclopedia
 |
This article contains information about scheduled or expected future computer chips. It may contain preliminary or speculative information, and may not reflect the final specification of the product. |
 |
AMD Fusion is the codename for a future next-generation microprocessor design and the product of the merger between AMD and ATI, combining general processor execution as well as 3D geometry processing and other functions of today's GPUs into a single package. AMD's merger with ATI closed on October 25, 2006. This technology is expected to debut in the second half of 2009 [1]; as a successor of the latest microarchitecture.
Regarding future AMD microarchitectures beyond the introduction of the latest microarchitecture at mid-2007 and a refresh of the microarchitecture in late 2007 and early 2008; AMD executive VP Henri Richard's June 2006 interview with DigiTimes hints at the future processor development beyond that of the well documented one:
| “ | Q: What is your broad perspective on the development of AMD processor technology over the next three to four years?
A: Well, as Dirk Meyer commented at our analysts meeting, we're not standing still. We've talked about the refresh of the current K8 architecture that will come in '07, with significant improvements in many different areas of the processor, including integer performance, floating point performance, memory bandwidth, interconnections and so on. You know that platform still has a lot of legs under it, but of course we're not standing still, and there's a next-generation core that's being worked on. I can't give you more details right now, but I think that what's important is that we're establishing clearly that this is a two-horse race. And as you would expect in a race, sometimes, when one horse is a little bit in front of the other, it reverses the situation. But what's important is that it is a race. |
” |
|
— AMD Executive VP, Henri Richard, Source: DigiTimes Interview with Henri Richard [1]
|
Contents |
[edit] Motivation
In an interview with Exec VP of AMD, Mario Rivas, CRN.com claims that: "With its Fusion program, AMD hopes to deliver multicore products using different kinds of processing blocks. A GPU, for example, will excel in multiple parallel computational tasks, while the CPU will take on heavy number-crunching duties. The Fusion-based processors, with the CPU and GPU integrated in a single architecture, should make the life of software programmers and application developers much easier, Rivas added." [2] This could signal that the design of Fusion has been going on for sometime.[citation needed]
[edit] Preliminary information
 |
This article may require cleanup to meet Wikipedia's quality standards. Please improve this article if you can. (January 2007) |
- A heterogeneous multicore microprocessor architecture, combining a general purpose processing core(s) and basic graphics core(s) into one processor package, with different clocks for the graphics core and the central processing core [3]
- Four platforms focus on the four different aspects of usage[4]
- General Purpose
- Data Centric
- Graphics Centric
- Media Centric
- The Fusion series processor will see new modular design methodology named "M-SPACE", such that design of future multi-core processors will have a wider range of combinations, as well as gaining enhanced flexibility, thus to minimize the architectural changes for different combinations of components. Benefitted from this initiative by AMD, graphics core can be changed without much re-design of the whole core [5]
- Fusion products will include at least 16 PCI Express (presumably version 2.0) lanes
- The implementation of UVD in silica [6] for full hardware decoding of MPEG2, VC-1 and H.264 video streams on supported software
- The first Z-RAM design on a 45 nm fabrication process node was completed in 2006 [7] together with the renewal of Z-RAM license, this is in coincidence with the process node that Fusion processors expected to be fabricated around the timeframe. This also conincide the AMD official roadmap for larger L3 caches after 2009, thus it was rumoured that AMD will likely to feature Z-RAM for larger L3 cache in Fusion products.
- A new set of instructions and development libraries for Fusion were being developed [8], and was revealed to be a new iteration of SSE, named SSE5, which is announced on the August 30, 2007.
- According to Dave Orton, Fusion will have 10% more pins than a "normal CPU" [9] but he failed to further elaborate on what is a "normal CPU".
- Employ Socket FS1 [10], and two other sockets so that each targeted at different products, Socket FS1 is for mobile parts, another for desktop products and the other server processors. [11]
- Expected to come in 2009 to replace the AMD Turion Ultra mobile processor for laptops.
[edit] Implementations
Two implementations were announced publicly during AMD events.
[edit] Falcon
- Codenamed the Falcon family
- Announced in AMD Technology Analyst Day July 2007
- Incorporation with GPU cores
- Target market:
- Originally planned with the codenamed Bulldozer processor cores focusing on desktop market with TDP of 10 to 100 Watts
- An option to be implemented into mobile phones, UMPC and small multimedia devices [12], with the codenamed Bobcat processor core focusing on low power consumption (1 to 10 Watts TDP) computations for handheld devices such as UMPC
[edit] Swift
- The plan was later changed to bring the first product of Fusion (codenamed Swift [13]),
- Based on the codenamed Stars CPU cores (K10 architecture) made on 45 nm process instead of Bulldozer and Bobcat cores
- Aimed at notebook market
- Native CPU die with a GPU core on the same package [14], implementing Socket FS1, with two variants [10]:
- Support for DDR3 [14]
- Incorporation of full DirectX-compliant GPU core(s)
- UVD technology for hardware video decoding
- ATI Hybrid Graphics Techonlogy: PowerXpress and Hybrid CrossFire X [14]
[edit] Speed increase
There is to be an expected speed increase with Fusion. Because the GPU and CPU will be on the same die, information transfer between the CPU and GPU/GPU memory will be significantly increased since there will be no need for the information to travel on a bus as there is with current motherboards (resulting in the GPU able to shunt far more data than on the PCI Express bus, due to significantly larger amounts of bandwidth available).
[edit] Media discussions
- digitimes.com AMD's vision for next few years - an interview with Henri Richard
- AMD's Purchase of ATI Closes, and Fusion Begins
[edit] Anticipated competitors
- Nehalem, Intel's one to eight core processor possibly including an integrated graphics core [15].
- VIA CoreFusion, a VIA product focused on low-power consumption computing market. But having nothing to do with an integration of gpu and cpu in one die.
[edit] References
- ^ "AMD's 2007 analyst day: Platforms and the glass half full", techreport.com, December 13, 2007.
- ^ "AMD sees Vista driving demand for graphics horsepower", crn.com, December 14, 2006.
- ^ Fudzilla report
- ^ AMD ATI merger - Official Investor PresentationPDF (846 KiB), retrieved July 24, 2006
- ^ Fudzilla report
- ^ The Inquirer report, retrieved September 12, 2007
- ^ ISi announcementPDF (77.4 KiB), retrieved August 14, 2007
- ^ Fudzilla report
- ^ Fudzilla report
- ^ a b AMD Financial Analyst Day 2007 presentation, presented by Mario Rivas, page 22 of 28. Retrieved December 14, 2007
- ^ The Inquirer report, retrieved November, 2007
- ^ Fudzilla report
- ^ AMD Financial Analyst Day 2007 presentation, presented by Mario Rivas, page 16 of 28. Retrieved December 14, 2007
- ^ a b c d e (Chinese) HKEPC report, retrieved March 4, 2008
- ^ The Inquirer report, retrieved September 18, 2007
[edit] See also
[edit] External links
|
||||||||||||||
