Socket FS1
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| This article contains information about scheduled or expected future computer chips. It may contain preliminary or speculative information, and may not reflect the final specification of the product. |
| Socket FS1 | ||
| Specifications | ||
|---|---|---|
| Type | ? | |
| Chip form factors | ? | |
| Contacts | ? | |
| Bus Protocol | ? | |
| FSB | ? | |
| Voltage range | ? | |
| Processors | future mobile Fusion products (Swift) | |
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This article is part of the CPU socket series |
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The Socket FS1 is a CPU socket to be implemented in the future notebook platform from AMD with its Fusion processors (codenamed Swift). [1]
While the processor will implement a "high-end GPU core with UVD" functionality, former ATI CEO Dave Orton has stated that Fusion products will have 10% more pins than a "normal CPU" [2] but further elaboration on what is a "normal CPU" was not given.
[edit] See also
[edit] References
- ^ AMD Financial Analyst Day 2007 presentation, presented by Mario Rivas, pages 16, 22 of 28. Retrieved December 14, 2007
- ^ Fudzilla report, retrieved December 14, 2007
[edit] External links
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