Image:Logic block pins.svg
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Logic_block_pins.svg (SVG file, nominally 205 × 185 pixels, file size: 6 KB)
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Contents |
[edit] Summary
An example of the connections of an FPGA logic block.
[edit] Source
Created by User:Joelholdsworth in Inkscape. This image is inelligable for copyright.
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This vector image was created with Inkscape. |
[edit] License
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This image is ineligible for copyright and therefore in the public domain, because it consists entirely of information that is common property and contains no original authorship.
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| Date/Time | Dimensions | User | Comment | |
|---|---|---|---|---|
| current | 16:39, 1 March 2007 | 205×185 (6 KB) | Joelholdsworth | (==Summary== An example of the connections of an FPGA logic block. ==Source== Created by User:Joelholdsworth in Inkscape. Use of this work which I have created is allowed under the terms of the GFDL license. {{Created with Inkscape}} ==License== {{GFD) |
| 16:35, 1 March 2007 | 205×185 (6 KB) | Joelholdsworth | (==Summary== An example of the connections of an FPGA logic block. ==Source== Created by User:Joelholdsworth in Inkscape. Use of this work which I have created is allowed under the terms of the GFDL license. {{Created with Inkscape}} ==License== {{) |
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