DEC 3000 AXP

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DEC 3000 Model 700 Server
DEC 3000 Model 700 Server

DEC 3000 AXP was the name given to a series of computer workstations and servers, produced from 1992 to around 1995 by Digital Equipment Corporation. The DEC 3000 AXP series formed part of the first generation of computer systems based on the 64-bit Alpha AXP architecture. Supported operating systems for the DEC 3000 AXP series were OSF/1 AXP (later renamed Digital UNIX) and OpenVMS.

All DEC 3000 AXP models used the 21064 (EV4) or 21064A (EV45) processor and inherited various features from the earlier MIPS architecture-based DECstation models, particularly the TURBOchannel bus.

The DEC 3000 AXP series was superseded by the AlphaStation/AlphaServer line.

Contents

[edit] Models

There were three DEC 3000 model families, codenamed Pelican, Sandpiper, and Flamingo. Within Digital, this led to the DEC 3000 series being affectionately referred to as "the seabirds".

Model Codename CPU CPU MHz B-cache (L2) Chassis Introduced
Model 300 Pelican EV4 150 256 KB desktop April 20, 1993
Model 300L Pelica EV4 100 256 KB desktop April 20, 1993
Model 300X Pelican+ EV4 175 256 KB desktop February 8, 1994
Model 300LX Pelica+ EV4 125 256 KB desktop February 8, 1994
Model 400 Sandpiper EV4 133 512 KB desktop November 10, 1992
Model 500 Flamingo EV4 150 512 KB pedestal November 10, 1992
Model 500X Hot Pink EV4 200 512 KB pedestal April 20, 1993
Model 600 Sandpiper+ EV4 175 2 MB desktop October 13, 1993
Model 700 Sandpiper45 EV45 225 2 MB desktop July 21, 1994
Model 800 Flamingo II EV4 200 2 MB pedestal October 13, 1993
Model 900 Flamingo45 EV45 275 2 MB pedestal July 21, 1994

Some model numbers were also suffixed with 'W' or 'S' to indicate workstation or server configuration respectively.

[edit] Description

The DEC 3000 AXP, with the exception of the Model 300, is based around a crossbar switch implemented by a ADDR (Address) ASIC and four SLICE data path ASICS. These ASICs connect together the various different width buses used in the system. The Model 300 uses a similair system architecture to the late model Personal DECstations.

[edit] Memory

The Sandpiper and Flamingo used proprietary 100-pin, 40-bit (32 bits plus 8 bits ECC) Fast Page Mode SIMMs of either 4 MB, 8 MB, 16 MB or 32 MB capacity.[1] These were eight-way interleaved, providing a 256-bit-wide bus to memory. The Sandpiper had two such eight-SIMM banks, for up to 512 MB total system RAM, while the Flamingo had four banks and supported up to 1 GB. In comparison, the Pelican was a budget architecture utilising eight standard 72-pin Fast Page Mode parity SIMMs of either 8 MB or 32 MB capacity, for a total of up to 256 MB RAM. These were two-way interleaved, allowing a 64-bit-wide bus to memory.

[edit] Expansion slots

The DEC 3000 AXP series uses the 32-bit TURBOchannel bus running at various speeds, 12.5 MHz in the 300 models, 22.5 MHz in the 400 models and 25 MHz in models 500 to 900. The TURBOchannel bus is provided by an ASIC, which connected it to the SLICE data path ASICs. The number to expansion slots also varied, the 300 models had two slots, except for the 300L, which had none. Models 400, 600 and 700 had three slots, the model 500X featured five, while models 500, 700 and 800 featured six.

[edit] Graphics

The Model 300 and 500 feature integrated graphics provided by the CXTurbo subsystem, which resides on the system module. The subsystem features a SFB (Smart Frame Buffer) ASIC, a Brooktree Bt459 RAMDAC, 2 MB of VRAM and in the Model 500, a 256 KB flash ROM that holds part of the system firmware. The CXTurbo subsystem can reach resolutions of 1280 × 1024 at 72 Hz in the 300, 300X, 300LX models, 1024 × 768 at 72 Hz in the Model 300L and 1280 × 1024 at 66 Hz or 72 Hz in the Model 500. This subsystem was also available in the HX TURBOchannel expansion card for other models without integrated graphics, or for multi-screen setups requiring multiple cards.

Other graphics include the PXG+ and PXG Turbo+ 3D graphics accelerators and the 2D TX. The PXG options required multiple TURBOchannel slots, two for the PXG+ and three for the PXG Turbo+ and feature a geometry pipeline built around an Intel i860 microprocessor, similair to those from other vendors at the time such as SGI. Later, the Kubota Denali and Digital's ZLX-E1/E2/E3, ZLX-L1/L2 and ZLX-M1/M2 were made available.

[edit] I/O subsystem

The I/O subsystem is based around a 16-bit bus controlled by the IOCTL ASIC, which also interfaces the subsystem to the TURBOchannel bus. The subsystem features a Dallas Semiconductor DS1287A real time clock, two Zilog Z85C30 UARTs for serial communications, an AMD 79C30A chip that provides telephone-quality audio and ISDN functionality, and an AMD 7990 LANCE (Local Area Network Controller for Ethernet) accompanied by a 7992 SIA (Serial Interface Adapter) that provided Ethernet capability through a BASE10-T or thickwire interface.

[edit] SCSI interface

The DEC 3000 AXP used a TCDS (TURBOchannel Dual SCSI) ASIC to provide an interface between between the SCSI controllers and the TURBOchannel bus. Early systems used one (Model 300s) or two (Model 400 and 500) NCR 53C94 SCSI controllers, which provided one or two 5 MB/s[2] 8-bit single ended SCSI buses. Later and higher end systems such as the Model 600, 700, 800 and 900 also feature two SCSI controllers, but used the NCR 53CF94-2 instead, which provided faster 10 MB/s 8-bit single ended SCSI buses.

[edit] References

[edit] Notes

  1. ^ When applied to computer memory (RAM or cache) the quantities KB, MB and GB are defined as:
    • 1 KB = 1024 B
    • 1 MB = 1024 KB
    • 1 GB = 1024 MB,
    consistent with the JEDEC memory standard.
  2. ^ When applied to parallel data transfer, the unit MB is defined as 1 MB = 1,000,000 B, so that 1 MB/s = 1,000,000 bytes per second.

[edit] External links

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