Talk:X86 assembly language

From Wikipedia, the free encyclopedia

Some small and working examples of how to use assembly language. Usually examples makes people leap forward in knowledge and learning.

Thanks 193.28.147.12 08:40, 20 January 2007 (UTC)

I think this article :

  • should have an introduction,
  • should link to some free software assembler.

Ericd 20:54 Apr 23, 2003 (UTC)

isn't NASM a free assembler?

smaffy

Perhaps this should be moved to Wikibooks? Dysprosia 12:12, 23 Oct 2003 (UTC)

Contents

[edit] This doesn't look like anything about assembly language

This article doesn't look like anything it has anything to do with assembly language, it looks more like a general overview of x86. Those articles already exist in the form of the x86 and IA-32 articles.

--ykhan 17:25, 2004 May 3 (UTC)

I agree. In fact, its not even a fair or correct description of x86 CPUs -- in particular AMD's processors do not have a "rename register" stage. (Rename registers are implicit, and don't require an additional stage to be assigned like they do in other processors.) A corrected version of this description could probably be added to an x86 CPU page.

I think this article should contrast x86 assembly versus, say, DSP, RISC assemblies. Talk about complex addressing, independence from alignment restrictions, atomic instructions, SIMD instructions, implicit flags, partially implicit and partially general registers.

(Paul Hsieh July 6, 2005)


To answer the question of merging IA32 and IA64 article's.
A catalog seperate's, and only usage binds.
A catalog can hold seperate usage bindings.

Niels Krook

Yeah i agree too guys. - Alex

LazyASM 0.52
NASM 0.98.39
FASM 1.64
NBASM32 00.25.97
YASM 0.40

[edit] List of x86 assembly language instructions

maybe such a list should be created?

  • Initial 8086/8088 instructions and "real mode"
    • Initial 8087 (x87) instructions
  • 80186/80188 additions (few)
    • 80187 additions (few if any)
  • 80286 additions, "protected mode"
    • 80287 additions (few if any)
  • 80386 additions, "virtual 8086 mode", 32bit
    • 80387 additions
  • 80486 additions (few), including x87 (few if any)
  • 80586 (Pentium) additions (few)
  • 80686 (Pentium Pro) additions (few)
  • 80786 (Athlon, P4) - none?
  • 80886 (Athlon64) additions (few), "long mode", 64bit
  • Intel MMX
  • Cyrix MMX extensions (supported by Athlon64)
  • AMD 3DNow!
  • AMD 3DNow! extensions
  • Intel SSE
  • Intel SSE2
  • Intel SSE3
    • SSE3 HyperThreading instructions (2)
  • Intel VMX - 10 instruction about Virtualisation Technology
  • x86-64 (AMD64) undocumented instructions and behaivour not supported in EM64T (Intel)
  • NexGen Nx586, Nx587 irregulars?
  • Other irregualrs - NEC, UMC, Cyrix, IDT, Rise, VIA, SiS, etc.
If you mean a complete list of instructions, that might better belong in a reference manual; we could link to Intel and AMD's reference documentation online.
Perhaps summarizing the instruction set, including various additions done at various times, would be useful. Guy Harris 20:34, 7 February 2006 (UTC)
It seems that there is already such list here: X86 instruction listings. But it is still incomplete 212.36.8.100 11:42, 25 February 2006 (UTC)


To answer the question of merging IA32 and IA64 article's. A catalog seperate's, and only usage binds. A catalog can hold seperate usage bindings. Niels Krook.

[edit] Framebuffer UI

How is Framebuffer UI in the External Links related to Assembly? This proves the above point that this article is not its own purpose, but rather an ad or a comparison. —The preceding unsigned comment was added by 24.185.112.164 (talk) 02:03, 28 December 2006 (UTC).

[edit] Processor modes

The section on processor modes is just plain wrong. The *only* difference between 16- and 32-bit modes is the *default* data and address sizes, however, one can override the default address and data sizes with prefixes (67 and 66 hex, respectively.)

The difference between real and protected modes lies in the meaning of segment register values -- in real mode, the segment base is directly computed from the segment register value by shifting right by four and the limit value is left unmodified (it defaults to 64K at boot time), whereas in protected mode it is an index (selector) into one of the Descriptor Tables (Global Descriptor Table or Local Descriptor Table) from which the base and limit are obtained. One normally assumes 16 bits when one is discussing real mode, but it is possible to force the processor into 32-bit real mode. (This, incidentally, is not the so-called "unreal mode", that is simply 16-bit real mode with the segment limits set to 4 GB.)

There are a handful of instructions related to descriptor tables that are unavailable in real mode. Also, the processor will not allow paging to be enabled in real mode. Tere is no obvious technical reason for that restriction, but it is enforced by the processor.

V86 mode is formally a submode of protected mode, and all the memory protections of protected mode are active, however, segments are handled the same way as in (16-bit) real mode. There is no way to force the processor into any kind of "32-bit V86 mode" (that works on all processors, that is.)

32-bit and SIMD instructions are available in all these modes!

x86-64 adds a new top-level mode, long mode, with the submodes compatibility mode (which in turn can be 16 or 32 bit) and 64-bit mode, which makes considerable changes to the instruction encoding, which allows a bigger register set. 64-bit instructions and the extended register set are only available in 64-bit mode.

Thus, you have a mode chart looking like this:

  • Real Mode
    • 16-bit Real Mode
      • Unreal Mode (4 GB segment limits)
    • 32-bit Real Mode (undocumented)
  • Protected Mode
    • 16-bit Protected Mode
    • 32-bit Protected Mode
    • V86 mode
  • Long Mode
    • Compatibility Mode
      • 16-bit Compatibility Mode
      • 32-bit Compatibility Mode
    • 64-bit Mode

There is also System Management Mode. This is actually not an ISA-level processor mode at all; rather, it is a special high-priority interrupt level (higher than even Non-Maskable Interrupt.) By default, SMM is entered in 16-bit Real Mode with 4 GB limits ("Unreal mode"), but it is possible and legal to switch processor modes while in SMM. The only instruction-level difference between SMM and ordinary execution is that the RSM (return from system management interrupt) instruction is only available after an SMM.

Hpa 00:45, 25 August 2007 (UTC)

[edit] Issues solved

I have fixed the issues that people have been concerned about with this article.

  • The article is now a basic summary of the features of x86 language
  • There is a new intro which is more specific and less technical
  • There is now a link to a list of assemblers
  • Information about the x86 in general and not the language has been moved to x86 architecture
  • Info on processor modes summarized and some of it merged as above.

Hopefully this article is much better now. Da rulz07 08:16, 14 November 2007 (UTC)

Young, Holla —Preceding unsigned comment added by 75.161.178.31 (talk) 06:00, 2 December 2007 (UTC)