PacoBlaze

From Wikipedia, the free encyclopedia

PacoBlaze is a synthesizable and behavioral Verilog implementation of Xilinx's PicoBlaze soft microcontroller core, and is available through the BSD License. The design includes the three PicoBlaze configurations in a single configurable set of files.

The core was written and is maintained by Pablo Bleyer. He also wrote a PicoBlaze/PacoBlaze assembler written in the Java language, KCAsm.

The performance of the processor is similar to the original Picoblaze, but depending on the implementation —and since it is a behavioral design— the size of the core in a current FPGA is between 30%-50% larger. However, unused portions of the core may be removed to reduce the number of digital blocks used and also improve speed.

[edit] See also

• PicoBlaze

[edit] External links

• PacoBlaze home page

v • d • e RISC-based processor architectures Altera Nios II · AMD 29000 · Analog Devices Blackfin · ARM · Atmel AVR · Atmel AVR32 · Cambridge Consultants XAP · DEC Alpha · Fairchild Clipper · HP PA-RISC · Intel i960 · M32R · LatticeMico32 · Microchip PIC · MIPS · Motorola 88000 · Power · SPARC · Renesas SuperH · Xilinx MicroBlaze · Xilinx Picoblaze