Emulation for Logic Validation

From Wikipedia, the free encyclopedia

This article does not cite any references or sources. (November 2007) Please help improve this article by adding citations to reliable sources. Unverifiable material may be challenged and removed.

Emulation for Logic Validation This process involves replicating the behavior of one or more pieces of hardware with a software environment (typically for a system under design). The goal of the emulation engineer is to create an environment that mimics the real automation hardware. The ultimate goal of emulation is to provide an environment for the manufacturing automation controls engineer to validate their PLC (Programmable Logic Controller) ladder logic and HMI (Human-Machine Interface) files prior to system debug in the plant environment.

[edit] Introduction

Unlike discrete event simulation, emulation for logic validation is not necessarily concerned with process centric timing.

[edit] History

What was first pioneered by General Motors in the early 90’s, emulation for logic validation has now begun to spawn an industry including software created for the sole purpose of emulation.

[edit] See also

• Programmable Logic Controller
• Ladder Logic
• Automation